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spy v3.0.0
Andrée Borrel
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The SIMD extensions the flags turn on, and what they can compute. More...
The SIMD extensions the flags turn on, and what they can compute.
spy::simd_instruction_set names the extension the flags enabled and the width of its registers, and the spy::supports::fp16 indicators say what that unit does with half-precision, which the same architecture macros decide.
Topics | |
| Supplemental Instruction Sets | |
| The instructions some extensions add on top of an existing set. | |
Variables | |
| constexpr bool | spy::supports::fp16::scalar_ops = spy_implementation_defined {} |
| Half-precision scalar arithmetic indicator. | |
| constexpr auto | spy::simd_instruction_set = spy_implementation_defined {} |
| SIMD extensions set reporting value. | |
| constexpr bool | spy::supports::fp16::type = spy_implementation_defined {} |
| Half-precision type availability indicator. | |
| constexpr bool | spy::supports::fp16::vector_conversion = spy_implementation_defined {} |
| Half-precision packed conversion indicator. | |
| constexpr bool | spy::supports::fp16::vector_ops = spy_implementation_defined {} |
| Half-precision vector arithmetic indicator. | |
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inlineconstexpr |
#include <spy/types.hpp>
Half-precision scalar arithmetic indicator.
Evaluates to true when the current architecture supports scalar operations on IEEE-754 half-precision floating-point numbers.
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inlineconstexpr |
#include <spy/simd.hpp>
SIMD extensions set reporting value.
SIMD extensions set detection is made so that one can ask if the current SIMD extension is exactly, below or above a given reference instruction set. Detectable instructions sets depends on SIMD hardware vendor
| Architecture | Supported SIMD instructions sets |
|---|---|
| X86 SSE | spy::sse1_, spy::sse2_, spy::sse3_, spy::ssse3_, spy::sse41_, spy::sse42_ |
| X86 AVX | spy::avx_, spy::avx2_, spy::avx512_ |
| Power PC VMX | spy::vmx_, spy::vmx_2_03_, spy::vmx_2_05_, spy::vmx_2_06_, spy::vmx_2_07_, spy::vmx_3_00_, spy::vmx_3_01_ |
| Power PC VSX | spy::vsx_, spy::vsx_2_06_, spy::vsx_2_07_, spy::vsx_3_00_, spy::vsx_3_01_ |
| ARM NEON | spy::neon_, spy::asimd_ |
| ARM SVE | spy::sve_, spy::sve128_, spy::sve256_, spy::sve512_, spy::sve1024_ |
| WASM | spy::simd128_ |
| RISC-V | spy::rvv_ |
Complete set of comparison operators is provided for those sets. Order of instructions sets are built so that if an instructions set supersedes another, it is considered greater than. For example, spy::avx_ is greater than spy::sse41_ as the former is a super-set of the later. Comparing SIMD descriptors across architecture is undefined behavior.
Moreover, the spy::simd_instruction_set object exposes a constexpr width static field that contains the size in bits of the current SIMD instructions set registers.
One can also simply asks if a given family of instructions set is available.
| Architecture | Generic indicator |
|---|---|
| X86 | spy::x86_simd_ |
| Power PC | spy::ppc_simd_ |
| ARM | spy::arm_simd_ |
| WASM | spy::wasm_simd_ |
| RISC-V | spy::riscv_simd_ |
Some SIMD instructions sets provide supplemental instructions on top of an existing one. The spy::supports namespace carries one indicator per supplemental set, spy::supports::fma_, spy::supports::fma4_, spy::supports::xop_ and spy::supports::f16c_ for the AVX family, and the spy::supports::avx512 namespace for the AVX-512 subsets. Each of them is documented on its own in this group.
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inlineconstexpr |
#include <spy/types.hpp>
Half-precision type availability indicator.
Evaluates to true when the _Float16 type is provided by the compiler on the current platform. The three other indicators of this namespace are meaningful only when this one is true.
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inlineconstexpr |
#include <spy/types.hpp>
Half-precision packed conversion indicator.
Evaluates to true when the current architecture supports packed conversion operations between IEEE-754 half-precision floating-point numbers and at least one other IEEE-754 floating-point type. It is implied by spy::supports::fp16::vector_ops.
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inlineconstexpr |
#include <spy/types.hpp>
Half-precision vector arithmetic indicator.
Evaluates to true when the current architecture supports vector operations on IEEE-754 half-precision floating-point numbers.